簡要描述:單片集成 6 比特光延時芯片是基于厚膜 SOI 硅光子技術(shù)、將硅基光開關(guān)和硅波導(dǎo)延時路單片集成的自主研發(fā)產(chǎn)品。集成的硅基光開關(guān)使其延時態(tài)切換速度達(dá)到 1 μs 以下,硅波導(dǎo)延時使其延時精度提升 1 個量級,厚膜 SOI 硅光技術(shù)使其光損耗達(dá)到工程應(yīng)用水平,單片集成的芯片解決了傳統(tǒng)光延時器的體積大、可靠性差問題,是可全方面滿足光控相控陣應(yīng)用要求的新一代產(chǎn)品。
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單片集成 6 比特光延時芯片
Single-chip Integrated 6 Bit Optical Delay Chip
〖簡介Introduction〗
梓冠光電的單片集成 6 比特光延時芯片是基于厚膜 SOI 硅光子技術(shù)、將硅基光開關(guān)和硅波導(dǎo)延時路單片集成的自主研發(fā)產(chǎn)品。集成的硅基光開關(guān)使其延時態(tài)切換速度達(dá)到 1 μs 以下,硅波導(dǎo)延時使其延時精度提升 1 個量級,厚膜 SOI 硅光技術(shù)使其光損耗達(dá)到工程應(yīng)用水平,單片集成的芯片解決了傳統(tǒng)光延時器的體積大、可靠性差問題,是可全方面滿足光控相控陣應(yīng)用要求的新一代產(chǎn)品。
The single-chip integrated 6-bit optical delay chip of Ziguan Photonics is an independently developed product based on thick film SOI silicon photonics technology, which integrates silicon based optical switches and silicon waveguide delay circuits on a single chip. The integrated silicon based optical switch achieves the delay state switching speed less than 1 μs, the delay of silicon waveguide improves its delay accuracy by one order of magnitude, and the thick film SOI silicon optical technology enables the optical loss to reach the level of engineering application. The single chip integrated chip solves the problems of large volume and poor reliability of traditional optical delay devices, and is a new generation product that can fully meet the application requirements of optically contronlled phased array.
特性Features〗
n 高速切換
High speed switching
n 高延時精度
High delay accuracy
n 超小尺寸
Ultra-small size
n 超寬帶工作
Ultra-broadband operation
n 全固態(tài)波導(dǎo)芯片可靠性強
All solid-state waveguide chip of high
〖應(yīng)用Applications〗
n 光控相控陣?yán)走_(dá)系統(tǒng)、電子對抗系統(tǒng)
Optically controlled phased array radar system、Electronic warfare system(EWS)
性能指標(biāo) Parameter | 單位 Unit | 典型值 Typical value | 備注 Notes |
延時位數(shù) Delay bits | / | 6 | 可定制 Can be customized |
最小延時步進(jìn) Min.step-delay | ps | 59.2 | 可定制 Can be customized |
可調(diào)節(jié)最大延時量 Adjustable max.delay | ps | 3729.6 | |
延時偏差 Delay deviation | ps | ≤±0.5 | ≤±1@max |
延時切換時間 Delay switching time | µs | ≤1 | |
插入損耗 Insertion loss | dB | 14 | |
各延時態(tài)損耗差異 Delay state loss difference | dB | ±0.5 | |
波損耗 Return loss | dB | 45 | |
芯片尺寸 Chip dimension | mm | 22×10×0.7 |
〖2×2 光開關(guān)(圖 1)的“交叉"、“直通"傳輸狀態(tài)定義如下〗
〖The "Cross" and "Bar" transmission states of the 2×2 optical switch (Figure 1) is defined as follows〗
“交叉"狀態(tài)(Cross 態(tài)):從輸入 A 端輸入,輸出端 D 有光信號輸出,輸出端 C 沒有光信號輸出時,即為"交叉“態(tài)(A→D);類似定義,從輸入端 B 輸入,輸出端 C 光信號輸出,輸出端 D 沒有光信號輸出,也為"交叉“態(tài)(B→C)。
“直通"態(tài)(bar 態(tài)):從輸入端 A 處輸入,輸出端 C 有輸出光信號,輸出端 D 沒有光信號輸出時,即為"直通“態(tài)(A→C);類似定義,從輸入端 B 輸入,輸出端 D 有光信號輸出,輸出端 C 沒有光信號輸出,也為“直通"態(tài)(B→àD。
序號No. | 名稱Name | 描述 Description | 序號 No. | 名稱 ame | 描述 Description |
1 | DMY | dummy | 19 | CH5+C | 開關(guān) 5 正極 cross 態(tài) |
2 | DMY | dummy | 20 | CH5- | 開關(guān) 5 負(fù)極 |
3 | DMY | dummy | 21 | CH5+B | 開關(guān) 5 正極 bar 態(tài) |
4 | DMY | dummy | 22 | CH6+C | 開關(guān) 6 正極 cross 態(tài) |
5 | DMY | dummy | 23 | CH6- | 開關(guān) 6 負(fù)極 |
6 | DMY | dummy | 24 | CH6+B | 開關(guān) 6 正極 bar 態(tài) |
7 | CH4+B | 開關(guān) 1 正極 bar 態(tài) | 25 | CH7+C | 開關(guān) 7 正極 cross 態(tài) |
8 | CH4- | 開關(guān) 1 負(fù)極 | 26 | CH7- | 開關(guān) 7 負(fù)極 |
9 | CH4+C | 開關(guān) 1 正極 cross 態(tài) | 27 | CH7+B | 開關(guān) 7 正極 bar 態(tài) |
10 | CH3+B | 開關(guān) 2 正極 bar 態(tài) | 28 | CH8+ | To be defined |
11 | CH3- | 開關(guān) 2 負(fù)極 | 29 | CH8- | To be defined |
12 | CH3+C | 開關(guān) 2 正極 cross 態(tài) | 30 | CH8+ | To be defined |
13 | CH2+B | 開關(guān) 3 正極 bar 態(tài) | 31 | DMY | dummy |
14 | CH2- | 開關(guān) 3 負(fù)極 | 32 | DMY | dummy |
15 | CH2+C | 開關(guān) 3 正極 cross 態(tài) | 33 | DMY | dummy |
16 | CH1+B | 開關(guān) 4 正極 bar 態(tài) | 34 | DMY | dummy |
17 | CH1- | 開關(guān) 4 負(fù)極 | 35 | DMY | dummy |
18 | CH1+C | 開關(guān) 4 正極 cross 態(tài) | 36 | DMY | dummy |
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